In 3 ∶ 8 line decoder one of the eight output bits is activated, depending on which of the following parameters

This question was previously asked in
RRB ALP Electronics Mechanic 23 Jan 2019 Official Paper (Shift 3)
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  1. Input Values from 0 to 7
  2. Next State output
  3. Previous output
  4. Clock input

Answer (Detailed Solution Below)

Option 1 : Input Values from 0 to 7
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Detailed Solution

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Concept:

  • A decoder is a combinational logic constructed with logic gates.
  • It is the reverse of the encoder.
  • A decoder circuit is used to transform a set of digital input signals into an equivalent decimal code of its output. For ‘n’ inputs a decoder gives ‘2n’ outputs.
  • Block diagram of the Decoder is shown below:

 

F1 T.S Madhu 21.07.20 D 5

Decoder expansion

n1 × m1 → n2 × m2

D1             D2

\(\frac{{{m_2}}}{{{m_1}}} = {K_1}\)

\(\frac{{{K_1}}}{{{m_1}}} = {K_2}\)

\(\frac{{{K_2}}}{{{m_1}}} = {K_3}\)

The number of D2 decoder required is given as:

∑ K = K1 + K2 + K3 + ------ 

Example:

Given decoder 1 is 3 × 8 and the second decoder is 5 × 32

\(\frac{{{32}}}{{{8}}} = {4}\)

\(\frac{{{4}}}{{{8}}} = {0}\)

Number of 3 × 8 decoders = 4 + 0

Number of 3 × 8 decoders = 4

Calculation:

One 2:4 decoder and four 3:8 decoders can represent 5:32 decoder in the following way:

F1 Tapesh Madhuri 10.05.2021 D7

Hence option (1) is the correct answer.

26 June 1

Given

Decoder

To be implemented

Required

2 x 4

4 x 16

4 + 1 = 5

2 x 4

3 x 8

2 + 0 = 2

3 x 8

6 x 64

8 + 1 = 9

4 x 16

6 x 64

4 + 0 = 4

4 x 16

8 x 256

16 + 1 = 17

 

 

 

 

 

 

 

 

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