Identify the gates G1 and G2 respectively in the figure given below to get Y = ABC

To get Y = ABC, we have to eliminate the complement of A̅ and B̅ from the input of the gate G₁.

This is possible with either a NAND gate at G₁ or a NOR gate at G₁

With NAND at G₁ and OR at G₂, we get:

\(Y = \overline {\left( {\bar A\;\bar B} \right)} + C\)

Y = A + B + C

∴ This is not the required case.

With NOR at G₁ and AND at G₂, we get:

\(Y = \overline {\left( {\bar A + \bar B} \right)} \cdot \left( C \right)\)

\(Y = \overline {\bar A} \cdot \overline {\bar B} \cdot C\) (Using De-Morgan’s law)

Y = ABC