Logic Gates and Boolean Algebra MCQ Quiz - Objective Question with Answer for Logic Gates and Boolean Algebra - Download Free PDF
Last updated on May 30, 2025
Latest Logic Gates and Boolean Algebra MCQ Objective Questions
Logic Gates and Boolean Algebra Question 1:
What is the output of a EX-OR gate when both inputs are '1'?
Answer (Detailed Solution Below)
Logic Gates and Boolean Algebra Question 1 Detailed Solution
The correct option is 4
Concept:
Input A | Input B | Output (A ⊕ B) |
---|---|---|
0 | 0 | 0 |
0 | 1 | 1 |
1 | 0 | 1 |
1 | 1 | 0 |
From the truth table, it is clear that the output of an EX-OR gate is '0' when both inputs are '1'. This is because the EX-OR gate outputs '1' only when the inputs are different. When both inputs are the same (either both 0 or both 1), the output is '0'. Therefore, the correct answer is option 4.
Logic Gates and Boolean Algebra Question 2:
Which combination of symbols represents an XOR (Exclusive-OR) gate?
Answer (Detailed Solution Below)
Logic Gates and Boolean Algebra Question 2 Detailed Solution
The correct answer is: 4) An OR gate with an additional curve at the input end.
Explanation:
The XOR (Exclusive-OR) gate is represented by:
-
An OR gate symbol (a curved shape)
-
With an additional curved line at the input side (to distinguish it from a standard OR gate).
Additional Information
Diagram of XOR Gate:
Truth Table XOR Gate |
||
Input |
Output |
|
A |
B |
Y |
0 |
0 |
0 |
0 |
1 |
1 |
1 |
0 |
1 |
1 |
1 |
0 |
Logic Gates and Boolean Algebra Question 3:
What is the primary goal of simplifying a Boolean expression before implementing it with gates?
Answer (Detailed Solution Below)
Logic Gates and Boolean Algebra Question 3 Detailed Solution
The primary goal of simplifying a Boolean expression before implementing it with gates is: 3) To reduce the number of gates and interconnections
Explanation:
- Minimizing gates reduces the circuit's cost, complexity, and physical space required.
- Fewer interconnections improve reliability (less chance of wiring errors or signal interference).
- Optimized circuits consume less power and operate faster (fewer propagation delays).
Logic Gates and Boolean Algebra Question 4:
Which of the following Boolean algebra rules is correct ?
Answer (Detailed Solution Below)
Logic Gates and Boolean Algebra Question 4 Detailed Solution
The correct answer is Option 4.
Key Points
- The correct Boolean algebra rule is A + A̅B = A + B.
- This rule can be derived using the Distributive Law and the Complement Law in Boolean algebra.
- First, we use the Distributive Law: A + A̅B = (A + A̅)(A + B).
- According to the Complement Law, (A + A̅) = 1.
- So, (A + A̅)(A + B) = 1.(A + B) = A + B.
- Therefore, the expression A + A̅B simplifies to A + B.
Additional Information
- Boolean algebra is a branch of algebra that deals with true or false values, typically denoted as 1 and 0 respectively.
- It is fundamental in the design of digital circuits and computer algorithms.
- Basic operations in Boolean algebra include AND, OR, and NOT.
- Boolean algebra helps in simplifying complex logical expressions and is used extensively in computer science and electrical engineering.
Logic Gates and Boolean Algebra Question 5:
The minimum number of 2-input NAND gate required to implement Boolean function F(A, B, C) = AB’+ BC+ AC is (assuming only normal inputs are available) :
Answer (Detailed Solution Below)
Logic Gates and Boolean Algebra Question 5 Detailed Solution
Concept:
The given Boolean function is \( F(A, B, C) = AB' + BC + AC \).
We are to implement this function using only 2-input NAND gates and assuming only normal (i.e., uncomplemented) inputs are available.
Step-by-step NAND Implementation:
1. Generate B’:
Using NAND gate: \( B' = B \text{ NAND } B \) → 1 gate
2. Generate AB’:
Use NAND to AND: \( A \cdot B' = (A \text{ NAND } B') \text{ NAND } (A \text{ NAND } B') \) → 2 gates
3. Generate BC:
\( BC = (B \text{ NAND } C) \text{ NAND } (B \text{ NAND } C) \) → 2 gates
4. Generate AC:
\( AC = (A \text{ NAND } C) \text{ NAND } (A \text{ NAND } C) \) → 2 gates
5. ORing all three terms:
To implement \( AB' + BC + AC \), we use NAND-based OR with DeMorgan’s law:
\( A + B = (A' \cdot B')' \) → Requires 2 NANDs for each OR combination.
Three terms OR can be done in 3 NAND gates optimally.
Total NAND Gates Required:
- 1 (B’)
- 2 (AB’)
- 2 (BC)
- 2 (AC)
- 3 (Final OR)
Total = 1 + 2 + 2 + 2 + 3 = 10 gates
Optimization:
With gate sharing and smart logic restructuring, it is possible to reduce the count. The minimum number of 2-input NAND gates required after such optimization is 4.
Top Logic Gates and Boolean Algebra MCQ Objective Questions
The output of the logic gate in figure is
Answer (Detailed Solution Below)
Logic Gates and Boolean Algebra Question 6 Detailed Solution
Download Solution PDFConcept:
XNOR Gate:
Symbol:
Truth Table:
Input A |
Input B |
Output \(Y={\overline{A\oplus B}}\) |
0 |
0 |
1 |
0 |
1 |
0 |
1 |
0 |
0 |
1 |
1 |
1 |
Output Equation: \(Y={\overline{A\oplus B}}\)
1) If B is always Low, the output is the inverted value of the other input A, i.e. A̅.
2) The output is low when both the inputs are different.
3) The output is high when both the inputs are the same.
4) XNOR gate produces an output only when the two inputs are same.
Analysis:
\(F = \overline{A+0}=\bar A\)
The minterm expansion of f (P, Q, R) = PQ + QR̅ + PR̅ is
Answer (Detailed Solution Below)
Logic Gates and Boolean Algebra Question 7 Detailed Solution
Download Solution PDFF(P, Q, R) = PQ + QR' + PR'
= PQ (R + R') + (P + P')QR' + P(Q + Q')R'
= PQR + PQR' + PQR' + P'QR' + PQR' + PQ'R'
= PQR + PQR' + P'QR' + PQ'R'
= m7 + m6 + m2 + m4
= m2 + m4 + m6 + m7Four statements are given below. Identify the correct statement.
Answer (Detailed Solution Below)
Logic Gates and Boolean Algebra Question 8 Detailed Solution
Download Solution PDF- AND, OR, NOT gates are the basic gates.
- The logic gates which are derived from the basic gates like AND, OR, NOT gates are known as derived gates. NAND, NOR, XOR, and XNOR are the derived gates.
- A universal gate is a gate which can implement any Boolean function without need to use any other gate type. The NAND and NOR gates are universal gates.
In Boolean algebra, (A.A̅) + A =?
Answer (Detailed Solution Below)
Logic Gates and Boolean Algebra Question 9 Detailed Solution
Download Solution PDF(A.A̅) + A
= 0 + A = A
All Boolean algebra laws are shown below:
Name |
AND Form |
OR Form |
Identity law |
1.A = A |
0 + A = A |
Null Law |
0.A = 0 |
1 + A = 1 |
Idempotent Law |
A. A = A |
A + A = A |
Inverse Law |
AA’ = 0 |
A + A’ = 1 |
Commutative Law |
AB = BA |
A + B = B + A |
Associative Law |
A(B.C) = (A.B)C |
(A + B) + C = A + (B + C) |
Distributive Law |
A + BC = (A + B) (A + C) |
A (B + C) = AB + AC |
Absorption Law |
A (A + B) = A |
A + AB = A |
De Morgan’s Law |
(AB)’ = A’ + B’ |
(A + B)’ = A’B’ |
The minimum number of 2-input NAND gates required to implement a 2-input XOR gate is
Answer (Detailed Solution Below)
Logic Gates and Boolean Algebra Question 10 Detailed Solution
Download Solution PDFThe number of 2-input NAND gates required to implement a 2-input XOR gate is 4.
Similarly, the number of 2-input NOR gates required to implement a 2-input XNOR gate is 4.
Logic Gates |
Min. number of NOR Gate |
Min. number of NAND Gate |
NOT |
1 |
1 |
AND |
3 |
2 |
OR |
2 |
3 |
EX-OR |
5 |
4 |
EXNOR |
4 |
5 |
NAND |
4 |
1 |
NOR |
1 |
4 |
Half-Adder |
5 |
5 |
Half-Subtractor |
5 |
5 |
Full-Adder |
9 |
9 |
Full-Subtractor |
9 |
9 |
The Boolean equation X = [(A + B̅) (B + C)] B can be simplified to
Answer (Detailed Solution Below)
Logic Gates and Boolean Algebra Question 11 Detailed Solution
Download Solution PDFX = [(A + B̅) (B + C)] B
= (AB + AC + 0 + B̅C)B
= AB + ABC
= AB(1 + C)
= AB
Name |
AND Form |
OR Form |
Identity law |
1.A=A |
0+A=A |
Null Law |
0.A=0 |
1+A=1 |
Idempotent Law |
A.A=A |
A+A=A |
Inverse Law |
AA’=0 |
A+A’=1 |
Commutative Law |
AB=BA |
A+B=B+A |
Associative Law |
(AB)C |
(A+B)+C = A+(B+C) |
Distributive Law |
A+BC=(A+B)(A+C) |
A(B+C)=AB+AC |
Absorption Law |
A(A+B)=A |
A+AB=A |
De Morgan’s Law |
(AB)’=A’+B’ |
(A+B)’=A’B’ |
Write the simplified equation for the given K-Map.
Answer (Detailed Solution Below)
Logic Gates and Boolean Algebra Question 12 Detailed Solution
Download Solution PDFConcept:
K-map:
- K-map (Karnaugh Map) is a pictorial method used to minimize Boolean expression without having to use Boolean Algebra theorems and equation manipulation.
- K-map can be thought of as a special version of a truth table.
- Using K-map, expression with two to four variables are easily minimized.
- K-maps are also referred to as 2D truth tables as each K-map is nothing but a different format of representing the values present in a one-dimensional truth table.
- To simplify a logic expression with two inputs, we require a K-map with 4 cells (= 22)
- Similarly, a logic expression with four inputs we require a K-map with 16 cells (= 24)
- Each cell within K-map has a definite place value which is obtained by using on encoding technique known as Gray code.
- For n-variable K-map, with 2n cells, try to group 2n cells first, then for 2n-1 cells, next for 2n-2 cells, and so on until the group contains only 2° cells ie. Isolated bits (if any)
- Also remember, the number of cells in a group must be equal to an integer power to 2 i.e. 1, 2, 4, 8, ….
Calculation:
→ There are no 16 bits group, no 8-bits group, but there are 2-four bits group
→ Eliminate the variables for which the corresponding hit appears within the group as both 0 and 1.
- Group 1 → B̅1 B2
- Group 2 → B1 B̅2
→ Therefore in SOP form (sum of products) output \(Y = \overline {{B_1}} {B_2} + \overline {{B_2}} {B_1}\)
The output Y of the logic circuit given below is:-
Answer (Detailed Solution Below)
Logic Gates and Boolean Algebra Question 13 Detailed Solution
Download Solution PDFXOR GATE
Symbol:
Truth Table:
Input A |
Input B |
Output Y = A ⊕ B |
0 |
0 |
0 |
0 |
1 |
1 |
1 |
0 |
1 |
1 |
1 |
0 |
Output Equation: \(Y = {\bf{A}} \oplus {\bf{B}} = \bar AB + A \bar B\)
Key Points:
1) If B is always High, the output is the inverted value of the other input A, i.e. A̅.
1) The output is low when both the inputs are the same.
2) The output is high when both the inputs are different.
Explanation:
\(Y = {\bf{\bar X}} \oplus {\bf{X}} = \bar{\bar X} X+\bar X \bar X\)
\(Y = XX+\bar X \bar X\)
\(Y = X+\bar X \)
Y = 1
Name |
AND Form |
OR Form |
Identity law |
1.A=A |
0+A=A |
Null Law |
0.A=0 |
1+A=1 |
Idempotent Law |
A.A=A |
A+A=A |
Inverse Law |
AA’=0 |
A+A’=1 |
Commutative Law |
AB=BA |
A+B=B+A |
Associative Law |
(AB)C |
(A+B)+C = A+(B+C) |
Distributive Law |
A+BC=(A+B)(A+C) |
A(B+C)=AB+AC |
Absorption Law |
A(A+B)=A |
A+AB=A |
De Morgan’s Law |
(AB)’=A’+B’ |
(A+B)’=A’B’ |
Boolean algebra obeys
Answer (Detailed Solution Below)
Logic Gates and Boolean Algebra Question 14 Detailed Solution
Download Solution PDF
Name |
AND Form |
OR Form |
Identity law |
1.A = A |
0 + A = A |
Null Law |
0.A = 0 |
1 + A = 1 |
Idempotent Law |
A.A = A |
A + A = A |
Inverse Law |
AA’ = 0 |
A + A’ = 1 |
Commutative Law |
AB = BA |
A + B = B + A |
Associative Law |
(AB)C |
(A + B) + C = A + (B + C) |
Distributive Law |
A + BC = (A + B)(A + C) |
A(B + C) = AB + AC |
Absorption Law |
A(A + B) = A |
A + AB = A |
De Morgan’s Law |
(AB)’ = A’ + B’ |
(A + B)’ = A’B’ |
If the Boolean expression P̅Q + QR + PR is minimized, the expression becomes:
Answer (Detailed Solution Below)
Logic Gates and Boolean Algebra Question 15 Detailed Solution
Download Solution PDFConcept:
Consensus Law is one of the most powerful theorems used in digital electronics for the minimization of Boolean function or equation either in the successive reduction method or in the K-Map method.
Statement:
- The consensus theorem states that the consensus term of a disjunction is defined when the terms in function are reciprocals to each other (such as A and A̅).
- The consensus theorem is defined in two statements (normal form and it's dual). They are
- AB + ĀC+BC = AB+ĀC
- (A+B)(Ā+C)(B+C) = (A+B)( Ā+C)
Calculation:
Y = P̅Q + QR + PR
Y = P̅Q + PR + QR (P̅ + P)
Y = P̅Q + PR + QRP̅ + QRP
Y = P̅Q(1 + R) + PR(1 + Q)
Y = P̅Q + PR where (1 + A = 1) according to Boolean algebra.