Counter MCQ Quiz - Objective Question with Answer for Counter - Download Free PDF
Last updated on May 30, 2025
Latest Counter MCQ Objective Questions
Counter Question 1:
How many distinct states are there are in an n-bit ring counter?
Answer (Detailed Solution Below)
Counter Question 1 Detailed Solution
Ring Counter:
The Ring shift counter is a recirculating register in which the serial output is connected back to the serial input as shown:
A Straight ring counter with ‘n’ flip-flops will have n states.
Example:
A Ring counter of 5 bits has 5 states.
Counter Question 2:
No. of Flip flop required for designing synchronous counter having 5 states with counting sequence : 0 = > 1 = > 6 = > 10 = > 4 will be :
Answer (Detailed Solution Below)
Counter Question 2 Detailed Solution
Concept:
The number of flip-flops required for a synchronous counter is determined by the highest binary value in the counting sequence. The formula is:
n ≥ log2(max state value)
where n is the number of flip-flops needed.
Calculation:
Given:
Counting sequence: 0 → 1 → 6 → 10 → 4
Solution:
1. Identify the highest state value in the sequence: 10
2. Convert 10 to binary: 1010 (4 bits)
3. Calculate minimum number of flip-flops:
n ≥ log2(10) → n ≥ 3.32
Since we can't have a fraction of a flip-flop, we round up to the next integer: n = 4
Verification:
4 flip-flops can represent up to 24 = 16 states (0-15), which covers all required states in the sequence (0,1,6,10,4).
Final Answer:
The number of flip-flops required is 3) 4.
Counter Question 3:
Match List - I with List - II.
List - I (Counter) |
List - II (uses / working) |
||
A. |
N-bit Ring Counter |
I. |
Uses universal clock |
B. |
Synchronous Counter |
II. |
Counts exactly N states |
C. |
Asynchronous Counter |
III. |
Counts 0 to 9 |
D. |
Decimal Counter |
IV. |
Main clock is applied to first flip-flop only |
Choose the correct answer from the options given below:
Answer (Detailed Solution Below)
Counter Question 3 Detailed Solution
The correct answer is A - II, B - I, C - IV, D - III
Key Points
- N-bit Ring Counter:
- This type of counter circulates a single '1' or '0' bit around a ring of N flip-flops. It counts exactly N states. So, A matches with II.
- Synchronous Counter:
- In this counter, all flip-flops are driven by a common clock signal. It uses a universal clock for all flip-flops. So, B matches with I.
- Asynchronous Counter:
- In this counter, the flip-flops do not change states at exactly the same time because they do not share a common clock signal. The main clock is applied to the first flip-flop only. So, C matches with IV.
- Decimal Counter:
- This counter counts from 0 to 9 and then resets to 0. It is also known as a decade counter. So, D matches with III.
Therefore, the correct option is A - II, B - I, C - IV, D - III. So, the correct option is 3).
Counter Question 4:
Shifting a register content to left by one bit is equivalent to____
Answer (Detailed Solution Below)
Counter Question 4 Detailed Solution
Concept:
Shifting a register content to left by one bit is equivalent to multiplication by 2.
Shifting a register content to right by one bit is equivalent to division by 2.
Explanation:
Decimal |
Binary |
Operation |
73 |
0100 1001 |
Original number |
73*2 = 146 |
1001 0010 |
left shift by |
Counter Question 5:
A register capable of incrementing and/or decrementing its contents.
Answer (Detailed Solution Below)
Counter Question 5 Detailed Solution
The correct answer is option 1): Counter
Concept:
Flip-flop is a 1-bit memory cell which can be used for storing digital data.- To increase the storage capacity in terms of the number of bits. A group of flip-flops is used. Such a group of flip-flops is known as a Register.
- A register capable of incrementing and/or decrementing its contents is called a counter
- A counter is a register capable of counting the number of clock pulses arriving at its clock input.
- A register is a group of flip-flops used to store multiple bits of data. An adder is a digital logic circuit in electronics that is extensively used for the addition of numbers.
- A latch is a circuit that has two stable states and can be used to store state information.
- The circuit can be made to change state by signals applied to one or more control inputs and will have one or two outputs.
Top Counter MCQ Objective Questions
A register capable of incrementing and/or decrementing its contents.
Answer (Detailed Solution Below)
Counter Question 6 Detailed Solution
Download Solution PDFThe correct answer is option 1): Counter
Concept:
Flip-flop is a 1-bit memory cell which can be used for storing digital data.- To increase the storage capacity in terms of the number of bits. A group of flip-flops is used. Such a group of flip-flops is known as a Register.
- A register capable of incrementing and/or decrementing its contents is called a counter
- A counter is a register capable of counting the number of clock pulses arriving at its clock input.
- A register is a group of flip-flops used to store multiple bits of data. An adder is a digital logic circuit in electronics that is extensively used for the addition of numbers.
- A latch is a circuit that has two stable states and can be used to store state information.
- The circuit can be made to change state by signals applied to one or more control inputs and will have one or two outputs.
Shifting a register content to left by one bit is equivalent to____
Answer (Detailed Solution Below)
Counter Question 7 Detailed Solution
Download Solution PDFConcept:
Shifting a register content to left by one bit is equivalent to multiplication by 2.
Shifting a register content to right by one bit is equivalent to division by 2.
Explanation:
Decimal |
Binary |
Operation |
73 |
0100 1001 |
Original number |
73*2 = 146 |
1001 0010 |
left shift by |
A 4-bit modulo 16 ripple counter uses JK flip flop. If the propagation delay of each flip flop is 50 ns, The maximum clock frequency that can be used is
Answer (Detailed Solution Below)
Counter Question 8 Detailed Solution
Download Solution PDFConcept:
In Ripple counters, the carry ripples through, or propagates through every flip-flop, i.e. the propagation delays of all the flip-flops are added to get the overall delay in the counter.
For the counter to work properly, the next clock pulse must arrive when all the carry's generated are propagated through all the flip-flops and the output is stable. This can be mathematically stated as:
For the ripple counter to count properly:
TCLK ≥ n (tpd)FF
TCLK = Clock Interval, and is the inverse of fCLK, i.e.
\(f_{CLK}≤ \frac{1}{n\times (t_{pd})_{FF}}\)
Calculation:
For 4-bit modulo 16 ripple counter has 4 JK flip flops. The total propagation delay will be:
\(T = 4 \times 50\;n\;sec \)
T = 200 nsec
∴ The maximum clock frequency will be:
\(f = \frac{1}{{200\;n}} = 5\;MHz\)
A 16-bit synchronous binary up-counter is clocked with a frequency fCLK. The two most significant bits are OR-ed together to form an output Y. Measurements show that Y is periodic, and the duration for which Y remains high in each period is 24 ms. The clock frequency fCLK is ______ MHz. (Round off 2 decimal places.)
Answer (Detailed Solution Below) 2.00 - 2.10
Counter Question 9 Detailed Solution
Download Solution PDFGiven:
Output (Y) is high (1) for the time period of 24 ms.
Q15 Q14 Q13 ⋅⋅⋅⋅⋅⋅⋅⋅⋅⋅⋅ Q0
Y = 1 begins at: 0100 0000 0000 ⋅⋅⋅⋅⋅⋅⋅⋅⋅⋅⋅ 0000
Y = 1 end at: 1111 1111 1111 ⋅⋅⋅⋅⋅⋅⋅⋅⋅⋅⋅ 1111
Number of states in which Y is low (0) = 214
Total number of states = 216
Number of states in which Y is high (1) = 216 - 214
Time when Y is high (1) in 216 - 214 = 24 × 10-3 s
Total time (T) = \(24\;\times 10^{-3} \over 2^{16}\;-\;2^{14} \)
Frequency = \({1\over {T}} = {2^{16}\;-2^{14} \over {} 24\;\times\;10^{-3}} = 2.048\;MHz \)
The minimum number of flip-flops required to construct a counter to count upto 200 (decimal)
Answer (Detailed Solution Below)
Counter Question 10 Detailed Solution
Download Solution PDFConcept:
For an ‘n’ flip flop counter,- The total number of states = 2n (0 to 2n – 1)
- The largest number that can be stored in the counter = 2n – 1
To construct any mod counter, the minimum number flip flops required such that: Modulus ≤ 2n
Where n is the number of counters.
Calculation:
Number no. of flip – flops are required to construct a mod-200 counter is obtained as:
2n ≥ 200
For n = 8
28 = 256 > 200
∴ 8 flip-flops required to construct a counter to count upto 200 (decimal)
A _________ is a register capable of counting the number of clock pulses arriving at its clock input.
Answer (Detailed Solution Below)
Counter Question 11 Detailed Solution
Download Solution PDF- A counter is a register capable of counting the number of clock pulses arriving at its clock input.
- A register is a group of flip flops used to store multiple bits of data.
- An adder is a digital logic circuit in electronics that is extensively used for the addition of numbers.
- A latch is a circuit that has two stable states and can be used to store state information. The circuit can be made to change state by signals applied to one or more control inputs and will have one or two outputs.
A divide by 490 counter requires how many flip flops ?
Answer (Detailed Solution Below)
Counter Question 12 Detailed Solution
Download Solution PDFThe correct answer is 'option 3'
Concept:
For a counter with ‘n’ flip flops:
- The total number of states = 2n (0 to 2n – 1)
- The largest number that can be stored in the counter = 2n – 1
To construct a counter with any MOD number, the minimum number flip flops required must satisfy:
Modulus ≤ 2n
Where n is the number of flip-flops and is the minimum value satisfying the above condition.
Solution:
2n>490
\(\implies n\ge 9\)
Which of the following counter is also called as asynchronous counter?
Answer (Detailed Solution Below)
Counter Question 13 Detailed Solution
Download Solution PDFConcept:
Synchronous counter:
- It can be designed with any flipflop.
- The synchronous counter doesn’t have a ripple effect
- Some clock pulse is applied to all flip flops.
Asynchronous counter:
- It can be designed with any flipflop.
- It has a ripple effect so called as ripple counters.
- Different clock pulses are provided to flipflops.
Ripple Counter: For an n-bit ripple counter, the MSB is generated only when the carry from all the previous flip-flops are propagated to the MSB flip flop.
∴ The maximum time (Worst-Case delay) taken for the output of the Ripple counter to be stable will be:
tmax = n × td
td is the propagation delay of each flip flop
Delay Problem:
- In asynchronous counters, the output of the previous stage serves as the clock of the next stage.
- As the number of stages increases the propagation delay of each flip flop stage adds up resulting in the propagation delay to become significant.
Synchronous UP-DOWN counter:
Johnson Counter:
Ring counter:
Ripple Counter:
A modulus 10 counter must have
Answer (Detailed Solution Below)
Counter Question 14 Detailed Solution
Download Solution PDFConcept:
For a counter with ‘n’ flip flops:
- The total number of states = 2n (0 to 2n – 1)
- The largest number that can be stored in the counter = 2n – 1
To construct a counter with any MOD number, the minimum number flip flops required must satisfy:
Modulus ≤ 2n
Where n is the number of flip-flops.
Calculation:
Number no. of flip–flops are required to construct a mod-10 counter, must satisfy:
2n ≥ 10 i.e.
n = 4
The minimum number of D flip-flops needed to design a mod-258 counter is
Answer (Detailed Solution Below)
Counter Question 15 Detailed Solution
Download Solution PDFThe correct answer is option 1
Concept:
Binary modulo N counter can count up to 0 to N – 1
Therefore, binary modulo 258 counters will count from 0 to 257 (order may vary)
Formula:
Minimum number of flip flop needed = ⌈log2 N⌉
Calculation:
An n-bit binary counter consists of n flip-flops and can count in binary from 0 to 2n – 1
Mod 258 counter has 258 states. We need to find the number of bits to represent max 257
\(\lceil{log_2n}\rceil = \lceil{log_2258}\rceil =9\) bits required
So the minimum number of D flip-flops needed is 9.