Question
Download Solution PDFConsider an unpipelined machine with 10nsec clock cycles which uses four cycles for ALU operations and branches where as five cycles for memory operation. Assume that the relative frequencies of these operations are: 40%, 20% and 40%, respectively. Due to clock skew and setup pipeline let us consider that the machine adds one nsec overhead to the clock. How much speedup is observed in the instruction execution rate when a pipelined machine is considered.
Answer (Detailed Solution Below)
Detailed Solution
Download Solution PDFThe correct answer is 4 times
EXPLANATION:
Operation | Frequency | Clock |
ALU | 40% = 0.40 | 4 |
BRANCH | 20% = 0.20 | 4 |
MEMORY | 40% = 0.40 | 5 |
Total Clock Cycle = 0.40 *4 + 0.20 * 4 + 0.40 * 5
Total Clock Cycle = 1.6 + 0.8 + 2
Total Clock Cycle = 4.4 Clock Cycle
Here,
Non-pipeline time = 4.4 clock cycle * 10 nsec
Non-pipeline time = 44nsec
Pipeline time = Clock time + overhead time = 10nsec + 1nsec = 11nsec
Speedup= Time taken by non-pipeline machine / Time taken by pipeline machine
Speedup = 44/11 = 4
So, the correct answer is 4 times
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